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| Freescale Semiconductor, Inc. Advance Information MAC7100EC/D Rev. 0.1, 10/2003 MAC7100 Microcontroller Family Hardware Specifications Freescale Semiconductor, Inc... 32-bit Embedded Controller Division This document provides electrical specifications, pin assignments, and package diagrams for MAC7100 family of microcontroller devices. For functional characteristics of the family, refer to the MAC7100 Microcontroller Family Reference Manual (MAC7100RM/D). This document contains the following topics: Topic Section 1, "Overview" Section 2, "Ordering Information" Section 3, "Electrical Characteristics" Section 4, "Device Pin Assignments" Section 5, "Mechanical Information" Page 1 2 3 36 41 1 Overview The MAC7100 Family of microcontrollers (MCUs) are members of a pin-compatible family of 32-bit Flash-memory-based devices developed specifically for embedded automotive applications. The pin-compatible family concept enables users to select between different memory and peripheral options for scalable designs. All MAC7100 Family members are composed of a 32-bit central processing unit (ARM7TDMI-S), up to 512Kbytes of embedded Flash EEPROM for program storage, up to 32Kbytes of embedded Flash for data and/or program storage, and up to 32Kbytes of RAM. The family is implemented with an enhanced DMA (eDMA) controller to improve performance for transfers between memory and many of the on-chip peripherals. The peripheral set includes asynchronous serial communications interfaces (eSCI), serial peripheral interfaces (DSPI), inter-integrated circuit (I2C) bus controllers, FlexCAN interfaces, an enhanced modular I/O subsystem (eMIOS), 10-bit analog-to-digital converter (ATD) channels, general-purpose timers (PIT) and two special-purpose timers (RTI and SWT). The peripherals share a large number of general purpose input-output (GPIO) pins, all of which are bidirectional and available with interrupt capability to trigger wake-up from low-power chip modes. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements. The operating frequency of devices in the family is up to a maximum of 50 MHz. The internal data paths between the CPU core, eDMA, memory and peripherals are all 32 bits wide, further improving performance for 32-bit applications. The PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com Ordering Information Freescale Semiconductor, Inc. MAC7111 and MAC7131 also offer a 16-bit wide external data bus with 22 address lines. The family of devices is capable of operating over a junction temperature range of -40 C to 150 C. Table 1 provides a comparison of members of the MAC7100 Family and the availability of peripheral modules on the various devices. Table 1. MAC7100 Family Device Derivatives Module Options Program Flash Data Flash SRAM External Bus MAC7101 512Kbytes 32Kbytes 32Kbytes No 2 4 4 2 1 16 channels, 16-bit 10 channels, 24-bit 111 144 LQFP MAC7111 512Kbytes 32Kbytes 32Kbytes Yes 1 4 4 2 1 16 channels, 16-bit 10 channels, 24-bit 111 144 LQFP MAC7121 512Kbytes 32Kbytes 32Kbytes No 1 4 4 2 1 16 channels, 16-bit 10 channels, 24-bit 84 112 LQFP MAC7131 512Kbytes 32Kbytes 32Kbytes Yes 2 4 4 2 1 16 channels, 16-bit 10 channels, 24-bit 127 208 MAP BGA MAC7141 512Kbytes 32Kbytes 32Kbytes No 1 2 2 2 1 16 channels, 16-bit 10 channels, 24-bit 71 100 LQFP Freescale Semiconductor, Inc... ATD Modules CAN Modules eSCI Modules DSPI Modules I2C Modules eMIOS Module Timer Module GPIO Pins (max.) Package 2 Ordering Information M AC 7 1 0 1 C PV 50 xx MC Status Core Code Core Number Generation / Family Package Option Device Number Temperature Range Package Identifier Speed (MHz) Optional Package Identifiers Temperature Option C = -40 C to 85 C V = -40 C to 105 C M = -40 C to 125 C Package Option FU = 100 QFP PV = 112 / 144 LQFP VF = 208 MAP BGA Figure 1. Order Part Number Example 2 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. Electrical Characteristics 3 Electrical Characteristics This section contains electrical information for MAC7100 Family microcontrollers. The information is preliminary and subject to change without notice. MAC7100 Family devices are specified and tested over the 5 V and 3.3 V ranges. For operation at any voltage within that range, the 3.3 V specifications generally apply. However, no production testing is done to verify operation at intermediate supply voltage levels. 3.1 Parameter Classification Freescale Semiconductor, Inc... The electrical parameters shown in this appendix are derived by various methods. To provide a better understanding to the designer, the following classification is used. Parameters are tagged accordingly in in the column labeled "C" of the parametric tables, as appropriate. Table 2. Parametric Value Classification P C T Parameters guaranteed during production testing on each individual device. Parameters derived by the design characterization and by measuring a statistically relevant sample size across process variations. Parameters derived by design characterization on a small sample size from typical devices under typical conditions (unless otherwise noted). All values shown in the typical column are within this classification, even if not so tagged. Parameters derived mainly from simulations. D 3.2 Absolute Maximum Ratings Absolute maximum ratings are stress ratings only. Functional operation outside these maximums is not guaranteed. Stress beyond these limits may affect reliability or cause permanent damage to the device. MAC7100 Family devices contain circuitry protecting against damage due to high static voltage or electrical fields; however, it is advised that normal precautions be taken to avoid application of any voltages higher than maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused inputs are tied to an appropriate logic voltage level (for example, either VSS5 or VDD5). Table 3. Absolute Maximum Ratings Num A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 Rating I/O, Regulator and Analog Supply Voltage Digital Logic Supply Voltage 1 PLL Supply Voltage 1 ATD Supply Voltage Analog Reference Voltage difference VDDX to VDDA Voltage difference VSSX to VSSA Voltage difference VRH - VRL Voltage difference VDDA - VRH Digital I/O Input Voltage Symbol VDD5 VDD2.5 VDDPLL VDDA VRH, VRL VDDX VSSX VRH - VRL VDDA - VRH VIN Min -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -0.3 -6.5 -0.3 Max +6.0 +3.0 +3.0 +6.5 +6.0 +0.3 +0.3 +6.5 +6.5 +6.0 Unit V V V V V V V V V V MOTOROLA MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com 3 Electrical Characteristics Freescale Semiconductor, Inc. Table 3. Absolute Maximum Ratings (continued) Num A11 A12 A13 A14 A15 A16 A17 1 Rating XFC, EXTAL, XTAL inputs TEST input Instantaneous Maximum Current Single pin limit for all digital I/O Single pin limit for TEST 5 2 Symbol VILV VTEST IDL ID IDA IDT T stg Min -0.3 -0.3 -25 -25 -25 -0.25 -65 Max +3.0 +10.0 +25 +25 +25 0 +155 Unit V V mA mA mA mA C Single pin limit for XFC, EXTAL, XTAL 3 pins 4 4 Single pin limit for all analog input pins Storage Temperature Range Freescale Semiconductor, Inc... 2 3 4 5 The device contains an internal voltage regulator to generate the logic and PLL supply from the I/O supply. The absolute maximum ratings apply when the device is powered from an external source. Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values using VPOSCLAMP = VDDA + 0.3 V and VNEGCLAMP = -0.3 V, then use the larger of the calculated values. These pins are internally clamped to VSSPLL and VDDPLL. All I/O pins are internally clamped to VSSX and VDDX, VSSR and VDDR or VSSA and VDDA. This pin is clamped low to VSSX, but not clamped high, and must be tied low in applications. 3.3 ESD Protection and Latch-up Immunity All ESD testing is in conformity with CDF-AEC-Q100 Stress test qualification for Automotive Grade Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body Model (HBM), the Machine Model (MM) and the Charge Device Model. A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot temperature, unless specified otherwise. Table 4. ESD and Latch-up Test Conditions Model Human Body Series Resistance Storage Capacitance Number of Pulses per pin positive negative Machine Series Resistance Storage Capacitance Number of Pulse per pin positive negative Latch-up Minimum input voltage limit Maximum input voltage limit Description Symbol R1 C -- Value 1500 100 -- 3 3 0 200 -- 3 3 -2.5 7.5 V V Ohm pF Unit Ohm pF R1 C -- 4 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. Electrical Characteristics Table 5. ESD and Latch-Up Protection Characteristics Num B1 B2 B3 B4 C Rating Symbol VHBM VMM VCDM ILAT Min 2000 200 500 +100 -100 +200 -200 Max -- -- -- -- -- mA Unit V V V mA C Human Body Model (HBM) C Machine Model (MM) C Charge Device Model (CDM) C Latch-up Current at TA = 125C positive negative C Latch-up Current at TA = 27C positive negative B5 ILAT Freescale Semiconductor, Inc... 3.4 Operating Conditions Unless otherwise noted, the following conditions apply to all parametric data. Refer to the temperature rating of the device (C, V, M) with respect to ambient temperature (TA) and junction temperature (TJ). For power dissipation calculations refer to Section 3.5, "Power Dissipation and Thermal Characteristics." Table 6. MAC7100 Family Device Operating Conditions Num C1 C2 C3 C4 C5 C6 C7 C8a C8b C9a C9b Rating I/O, Regulator and Analog Supply Voltage Digital Logic Supply PLL Supply Voltage 1 Voltage 1 Symbol VDD5 VDD2.5 VDDPLL VDDX VSSX fosc fbus 2 Min 4.5 2.35 2.35 -0.1 -0.1 0.5 0.5 -40 -40 -40 -40 -40 -40 Typ 5 2.5 2.5 0 0 -- -- -- 25 -- 25 -- 25 Max 5.5 2.75 2.75 0.1 0.1 16 50 110 85 130 105 150 125 Unit V V V V V MHz MHz C C C C C C Voltage Difference VDDX to VDDA Voltage Difference VSSX to VSSA Oscillator Frequency Bus Frequency MAC7100C Operating Junction Temperature Range TJ T A Operating Ambient Temperature Range 2 MAC7100V Operating Junction Temperature Range 2 TJ TA TJ TA Operating Ambient Temperature Range 2 2 C10a MAC7100M Operating Junction Temperature Range C10b 1 Operating Ambient Temperature Range 2 The device contains an internal voltage regulator to generate the logic and PLL supply from the I/O supply. The absolute maximum ratings apply when this regulator is disabled and the device is powered from an external source. 2 Please refer to Section 3.5, "Power Dissipation and Thermal Characteristics," for more details about the relation between ambient temperature TA and device junction temperature TJ. MOTOROLA MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com 5 Electrical Characteristics Freescale Semiconductor, Inc. 3.4.1 5 V I/O Pins The I/O pins operate at a nominal level of 5 V. This class of pins is comprised of the clocks, control and general purpose/peripheral pins. The internal structure of these pins is identical; however, some functionality may be disabled (for example, for analog inputs the output drivers, pull-up/down resistors are permanently disabled). 3.4.2 Oscillator Pins The pins XFC, EXTAL, XTAL are dedicated to the oscillator and operate at a nominal level of 2.5 V. 3.5 Power Dissipation and Thermal Characteristics Freescale Semiconductor, Inc... Power dissipation and thermal characteristics are closely related. The user must assure that the maximum operating junction temperature is not exceeded. Note that the JEDEC specification reserves the symbol RJA or JA (Theta-JA) strictly for junction-toambient thermal resistance on a 1s test board in natural convection environment. RJMA or JMA (Theta-JMA) will be used for both junction-to-ambient on a 2s2p test board in natural convection and for junction-to-ambient with forced convection on both 1s and 2s2p test boards. It is anticipated that the generic name, JA, will continue to be commonly used. The average chip-junction temperature (TJ) in C is obtained from: T J = T A + ( JA ) T J = Junction Temperature ( C) T A = Ambient Temperature ( C) P D = Total Chip Power Dissipation (W) JA = Package Thermal Resistance ( C/W) The total power dissipation is calculated from: P D = P INT + P IO P INT = Chip Internal Power Dissipation (W) P INT = ( I DD x V DD ) + ( I DD PLL x V DD PLL ) + ( I DD A x V DD A ) Two cases for PIO, with the internal voltage regulator enabled and disabled, must be considered: 1. Internal Voltage Regulator disabled: P IO = RDSON ( IIO ) 2 i i PIO is the sum of all output currents on I/O ports associated with VDDX and VDDR. V OL R DSON = --------- (for outputs driven low) I OL or V DD 5 - V OH R DSON = ------------------------------- (for outputs driven high) I OL P INT = ( I DD R x V DD R ) + ( I DD A x V DD A ) 2. Internal voltage regulator enabled: IDDR is the current shown in Table 12 and not the overall current flowing into VDDR, which additionally contains the current flowing into the external loads with output high. 6 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. Electrical Characteristics 3.5.1 Power Dissipation Simulation Details Table 7. Thermal Resistance for 100 lead 14x14 mm LQFP, 0.5 mm Pitch 1 Single layer board (1s) Four layer board (2s2p) Single layer board (1s) Four layer board (2s2p) RJA RJMA RJMA RJMA RJB RJC JT Value 44 34 37 29 18 7 2 Unit C/W C/W C/W C/W C/W C/W C/W Comments 1, 2 1, 3 1, 3 1, 3 4 5 6 Rating Junction to Ambient (Natural Convection) Junction to Ambient (Natural Convection) Junction to Ambient (@ 200 ft./min.) Junction to Ambient (@ 200 ft./min.) Junction to Board Junction to Case Junction to Package Top 1 Natural Convection 100 LQFP, Case Outline: 983-02 Table 8. Thermal Resistance for 112 lead 20x20 mm LQFP, 0.65 mm Pitch 1 Freescale Semiconductor, Inc... Rating Junction to Ambient (Natural Convection) Junction to Ambient (Natural Convection) Junction to Ambient (@ 200 ft./min.) Junction to Ambient (@ 200 ft./min.) Junction to Board Junction to Case Junction to Package Top 1 Single layer board (1s) Four layer board (2s2p) Single layer board (1s) Four layer board (2s2p) Natural Convection RJA RJMA RJMA RJMA RJB RJC JT Value 42 34 35 30 22 7 2 Unit C/W C/W C/W C/W C/W C/W C/W Comments 1, 2 1, 3 1, 3 1, 3 4 5 6 112 LQFP, Case Outline: 987-01 Table 9. Thermal Resistance for 144 lead 20x20 mm LQFP, 0.5 mm Pitch 1 Rating Junction to Ambient (Natural Convection) Junction to Ambient (Natural Convection) Junction to Ambient (@ 200 ft./min.) Junction to Ambient (@ 200 ft./min.) Junction to Board Junction to Case Junction to Package Top 1 Single layer board (1s) Four layer board (2s2p) Single layer board (1s) Four layer board (2s2p) Natural Convection RJA RJMA RJMA RJMA RJB RJC JT Value 42 34 35 30 22 7 2 Unit C/W C/W C/W C/W C/W C/W C/W Comments 1, 2 1, 3 1, 3 1, 3 4 5 6 144 LQFP, Case Outline: 918-03 Table 10. Thermal Resistance for 208 lead 17x17 mm MAP, 1.0 mm Pitch 1 Rating Junction to Ambient (Natural Convection) Junction to Ambient (Natural Convection) Junction to Ambient (@ 200 ft./min.) Junction to Ambient (@ 200 ft./min.) Junction to Board Junction to Case Junction to Package Top 1 Single layer board (1s) Four layer board (2s2p) Single layer board (1s) Four layer board (2s2p) Natural Convection RJA RJMA RJMA RJMA RJB RJC JT Value 46 29 38 26 19 7 2 Unit C/W C/W C/W C/W C/W C/W C/W Comments 1, 2 1, 3 1, 3 1, 3 4 5 6 208 MAP BGA, Case Outline: 1159A-01 Comments: 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance. 2. Per SEMI G38-87 and JEDEC JESD51-2 with the single layer board (JESD51-3) horizontal. 3. Per JEDEC JESD51-6 with the board (JESD51-7) horizontal. 4. Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board at the center lead. For fused lead packages, the adjacent lead is used. 5. Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1). 6. Thermal characterization parameter indicating the temperature difference between package top and junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT. MOTOROLA MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com 7 Electrical Characteristics Freescale Semiconductor, Inc. Table 11. Power Dissipation 1/8 Simulation Model Packaging Parameters Component Mold Compound Leadframe (Copper) Die Attach Conductivity 0.9 W/m K 263 W/m K 1.7 W/m K 3.6 Power Supply Freescale Semiconductor, Inc... The MAC7100 Family utilizes several pins to supply power to the oscillator, PLL, digital core, I/O ports and ATD. In the context of this section, VDD5 is used for VDDA, VDDR or VDDX; VSS5 is used for VSSA, VSSR or VSSX unless otherwise noted. IDD5 denotes the sum of the currents flowing into the VDDA, VDDX, and VDDR. VDD is used for VDD2.5, and VDDPLL, VSS is used for VSS2.5 and VSSPLL. IDD is used for the sum of the currents flowing into VDD2.5 and VDDPLL. 3.6.1 Current Injection The power supply must maintain regulation within the VDD5 or VDD2.5 operating range during instantaneous and operating maximum current conditions. If positive injection current (Vin > VDD5) is greater than IDD5, the injection current may flow out of VDD5 and could result in the external power supply going out of regulation. It is important to ensure that the external VDD5 load will shunt current greater than the maximum injection current. The greatest risk will be when the MCU is consuming very little power (for example, if no system clock is present, or if the clock rate is very low). 3.6.2 Power Supply Pins The VDDR - VSSR pair supplies the internal voltage regulator. The VDDA - VSSA pair supplies the A/D converter and the reference circuit of the internal voltage regulator. The VDDX - VSSX pair supplies the I/O pins. VDDPLL - VSSPLL pair supplies the oscillator and PLL. All VDDX pins are internally connected by metal. All VSSX pins are internally connected by metal. All VSS2.5 pins are internally connected by metal. VDDA, VDDX and VDDR as well as VSSA, VSSX and VSSR are connected by anti-parallel diodes for ESD protection. 3.6.3 Supply Currents All current measurements are without output loads. Unless otherwise noted the currents are measured in single chip mode, internal voltage regulator enabled and at 40MHz bus frequency using a 4MHz oscillator in low power mode. Production testing is performed using a square wave signal at the EXTAL input. In expanded modes, the currents flowing in the system are highly dependent on the load at the address, data and control signals as well as on the duty cycle of those signals. No generally applicable numbers can be given. A good estimate is to take the single chip currents and add the currents due to the external loads. 8 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. Table 12. Supply Current Characteristics Num C Rating D1a C Run Supply Current Single Chip -40 C 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 -40 C 2 25 C 2 85 C 2 105 C 2 125 C 2 2 Electrical Characteristics D1c C Pins Freescale Semiconductor, Inc... D2 D3a D3c C Pins D4a D4c C Pins 1 At the time of publication, this value is yet to be determined, and will be supplied when device characterization is complete. 85C, 105C, and 125C refer to the "C", "V", and "M" Temperature Options, respectively. 3 RTI disabled / enabled. 2 MOTOROLA MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com Regulator D4b C Core C Stop Current TJ = TA assumed Regulator D3b C Core C Doze Supply Current C Psuedo Stop Current PLL on Regulator (if enabled) D1b C Typ --1 --1 --1 --1 --1 IDDRreg --1 --1 --1 --1 --1 IDDRpins --1 --1 --1 --1 --1 Run Doze Pseudo Stop IDDPScore --1 --1 --1 --1 --1 IDDPSreg --1 278 / 327 3 --1 --1 --1 IDDPSpins --1 4/53 --1 --1 --1 IDDScore --1 --1 --1 --1 --1 IDDSreg --1 68 --1 --1 --1 IDDSpins --1 4 --1 --1 --1 Symbol IDDRcore Max --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 --1 Unit mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA A A A A A A A A A A A A A A A A A A A A A A A A A A A A A A Core 9 Electrical Characteristics Freescale Semiconductor, Inc. 3.6.4 Num E1 E2 C Voltage Regulator Characteristics Table 13. VREG Operating Conditions Characteristic Symbol VVDDRA IREG Min 2.97 -- -- 2.45 1.60 -- 2.35 2.00 1.60 -- 4.10 4.25 2.25 0.97 -- Typical -- TBD TBD 2.5 2.5 --1 2.5 2.5 2.5 --1 4.37 4.52 2.35 -- -- Max 5.5 50 40 2.75 2.75 -- 2.75 2.75 2.75 -- 4.66 4.77 -- -- 2.05 Unit V A A V V V V V V V V V V V V P Input Voltages P Regulator Current Reduced Power Mode Shutdown Mode P Output Voltage Core Full Performance Mode Reduced Power Mode Shutdown Mode P Output Voltage PLL Full Performance Mode Reduced Power Mode 2 Reduced Power Mode 3 Shutdown Mode P Low Voltage Interrupt 4 Assert Level Deassert Level P Low Voltage Reset 5 Assert Level P Power On Reset Assert Level Deassert Level 6 E3 VDD E4 VDDPLL Freescale Semiconductor, Inc... E5 VLVIA VLVID VLVRA VPORA VPORD E6 E7 1 2 3 4 5 6 High Impedance Output. Current IDDPLL = 1mA (Low Power Oscillator). Current IDDPLL = 3mA (Standard Oscillator). Monitors VDDA, active only in full performance mode. Indicated I/O and ATD performance degradation due to low supply voltage. Monitors VDD2.5, active only in full performance mode. Only POR is active in reduced performance mode. Monitors VDD2.5, active in all modes. 10 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. Electrical Characteristics 3.6.5 Chip Power Up and Voltage Drops The VREG sub-modules LVI (low voltage interrupt), POR (power on reset) and LVR (low voltage reset) handle chip power-up or drops of the supply voltage. Refer to Figure 2. Voltage VLVID VLVIA VDDA VDD2.5 VLVRD VLVRA VPORD Freescale Semiconductor, Inc... LVI POR LVR Note: Not to scale. LVI Enabled LVI Disabled due to LVR Time Figure 2. VREG Chip Power-up and Voltage Drops 3.6.6 Output Loads Table 14. VREG Recommended Load Capacitances Rating Symbol CLVDD CLVDDfcPLL Min 200 90 Typ 440 220 Max 12000 5000 Unit nF nF The on-chip voltage regulator is intended to supply the internal logic and oscillator circuits. No external DC load is allowed. Capacitive loads are specified in Table 14. Capacitors with X7R dielectricum are required. Load Capacitance on each VDD2.5 pin Load Capacitance on VDDPLL pin MOTOROLA MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com 11 Electrical Characteristics Freescale Semiconductor, Inc. 3.7 I/O Characteristics Table 15. 5 V I/O Characteristics This section describes the characteristics of all I/O pins in both 3.3 V and 5 V operating conditions. All parameters are not always applicable; for example, not all pins feature pull up/down resistances. Conditions shown in Table 6 unless otherwise noted Num C F1a F1b F2a P Input High Voltage T Input High Voltage P Input Low Voltage T Input Low Voltage C Input Hysteresis P Input Leakage Current (pins in high impedance input mode) 1 Vin = VDD5 or VSS5 F5 P Output High Voltage (pins in output mode) Partial Drive IOH = -2mA Full Drive IOH = -10mA P Output Low Voltage (pins in output mode) Partial Drive IOL = +2mA Full Drive IOL = +10mA P Internal Pull Up Device Current, tested at VIL Max. P Internal Pull Up Device Current, tested at VIH Min. P Internal Pull Down Device Current, tested at VIH Min. P Internal Pull Down Device Current, tested at VIL Max. D Input Capacitance T Injection Single Pin limit Total Device Limit. Sum of all injected currents P Port Interrupt Input Pulse filtered 3 P Port Interrupt Input Pulse passed 3 current 2 Rating Symbol V IH Min 0.65 x VDD5 -- -- VSS5 - 0.3 -- TBD VDD5 - 0.8 -- Typ -- -- -- -- 250 -- -- Max -- VDD5 + 0.3 0.35 x VDD5 -- -- TBD -- Unit V V V V mV A V VIH VIL VIL VHYS I in Freescale Semiconductor, Inc... F2b F3 F4 VOH F6 V OL -- 0.8 V F7 F8 F9 F10 F11 F12 IPUL IPUH IPDH IPDL Cin IICS IICP tPULSE tPULSE -- -10 -- 10 -- -2.5 -25 -- 10 -- -- -- -- 6 -- -130 -- 130 -- -- 2.5 25 A A A A pF A F13 F14 1 -- -- 3 -- s s Maximum leakage current occurs at maximum operating temperature. Current decreases by approximately one-half for each 8C to 12C in the temperature range from 50C to 125C. 2 Refer to Section 3.6.1, "Current Injection," for more details 3 Parameter only applies in STOP or Pseudo STOP mode. 12 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. Table 16. 3.3 V I/O Characteristics Conditions shown in Table 6, with VDDX = 3.3 V 10% and a temperature maximum of +140C unless otherwise noted. Num C G1a P Input High Voltage G1b T Input High Voltage G2a P Input Low Voltage G2b T Input Low Voltage G3 C Input Hysteresis P Input Leakage Current (pins in high impedance input mode) V = V 5 or V 5 in DD SS 1 Rating Symbol VIH VIH VIL VIL VHYS Iin V OH Min 0.65 x VDD5 -- -- VSS5 - 0.3 -- TBD VDD5 - 0.4 -- Typ -- -- -- -- 250 -- -- Max -- VDD5 + 0.3 0.35 x VDD5 -- -- TBD -- Unit V V V V mV A V Freescale Semiconductor, Inc... G4 G5 P Output High Voltage (pins in output mode) Partial Drive IOH = -0.75mA Full Drive IOH = -4.5mA P Output Low Voltage (pins in output mode) Partial Drive IOL = +0.9mA Full Drive IOL = +5.5mA P Internal Pull Up Device Current, tested at VIL Max. P Internal Pull Up Device Current, tested at VIH Min. P Internal Pull Down Device Current, tested at VIH Min. G6 VOL -- 0.4 V G7 G8 G9 IPUL IPUH IPDH IPDL Cin IICS IICP tPULSE tPULSE -- -6 -- 6 -- -2.5 -25 -- 10 -- -- -- -- 6 -- -60 -- 60 -- -- 2.5 25 A A A A pF A G10 P Internal Pull Down Device Current, tested at VIL Max. G11 D Input Capacitance G12 T Injection Single Pin limit Total Device Limit. Sum of all injected currents G13 P Port Interrupt Input Pulse filtered 3 G14 P Port Interrupt Input Pulse passed 3 1 current 2 -- -- 3 -- s s Maximum leakage current occurs at maximum operating temperature. Current decreases by approximately one-half for each 8C to 12C in the temperature range from 50C to 125C. 2 Refer to Section 3.6.1, "Current Injection," for more details 3 Parameter only applies in STOP or Pseudo STOP mode. MOTOROLA MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com 13 Electrical Characteristics Freescale Semiconductor, Inc. 3.8 Clock and Reset Generator Electrical Characteristics This section describes the electrical characteristics for the oscillator, phase-locked loop, clock monitor and reset generator. 3.8.1 Oscillator Characteristics Freescale Semiconductor, Inc... The MAC7100 Family features an internal low power loop controlled Pierce oscillator and a full swing Pierce oscillator/external clock mode. The selection of loop controlled Pierce oscillator or full swing Pierce oscillator/external clock depends on the level of the XCLKS signal at the rising edge of the RESET signal. Before asserting the oscillator to the internal system clock distribution subsystem, the quality of the oscillation is checked for each start from either power on, STOP or oscillator fail. tCQOUT specifies the maximum time before switching to the internal self clock mode after POR or STOP if a proper oscillation is not detected. The quality check also determines the minimum oscillator start-up time tUPOSC. The device also features a clock monitor. A Clock Monitor Failure is asserted if the frequency of the incoming clock signal is below the Clock Monitor Assert Frequency fCMFA. Table 17. Oscillator Characteristics Num C Rating Symbol fOSC fOSC IOSC tUPOSC tCQOUT fCMFA fEXT tEXTL tEXTH tEXTR tEXTF CIN VDCBIAS 2 Min 4.0 0.5 100 -- 0.45 50 0.5 9.5 9.5 -- -- -- -- Typ -- -- -- TBD 3 -- 100 -- -- -- -- -- 7 TBD Max 16 40 -- 50 4 2.5 200 40 -- -- 1 1 -- -- Unit MHz MHz A ms s KHz MHz ns ns ns ns pF V H1a C Crystal oscillator range (loop controlled Pierce) H1b C Crystal oscillator range (full swing Pierce) 1, 2 H2 H3 H4 H5 H6 H7 H8 H9 P Startup Current C Oscillator start-up time (loop controlled Pierce) D Clock Quality check time-out P Clock Monitor Failure Assert Frequency P External square wave input frequency D External square wave pulse width low D External square wave pulse width high D External square wave rise time H10 D External square wave fall time H11 D Input Capacitance (EXTAL, XTAL pins) H12 C EXTAL pin DC Operating Bias in loop controlled mode 1 2 Depending on the crystal; a damping series resistor might be necessary XCLKS negated during reset 3 fosc = 4 MHz, C = 22 pF. 4 Maximum value is for extreme cases using high Q, low frequency crystals 14 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.8.2 PLL Filter Characteristics The oscillator provides the reference clock for the PLL. The voltage controlled oscillator (VCO) of the PLL is also the system clock source in self clock mode. In order to operate reliably, care must be taken to select proper values for external loop filter components. VDDPLL CS R CP VCO KV fVCO Phase Detector fOSC 1 REFDV+1 fREF K Freescale Semiconductor, Inc... fCMP Loop Divider 1 SYNR+1 1 2 Figure 3. Basic PLL Functional Diagram The procedure described below can be used to calculate the resistance and capacitance values using typical values for K1, f1 and ich from Table 18. First, the VCO Gain at the desired VCO output frequency is approximated by: KV = K1 e ( f 1 - f VCO ) ------------------------K 1 1V The phase detector relationship is given by: K = - i ch K V ich is the current in tracking mode. The loop bandwidth fC should be chosen to fulfill the Gardner's stability criteria by at least a factor of 10, typical values are 50. = 0.9 ensures a good transient response. 2 f ref f ref 1 f C < ---------------------------------------- ----- f C < ------------- ;( = 0.9 ) - 50 4 50 2 ( + 1 + ) And finally the frequency relationship is defined as f VCO n = ----------- = 2 ( synr + 1 ) f ref With the above inputs the resistance can be calculated as: 2 n fC R = --------------------------K The capacitance CS can now be calculated as: 2 0.516 C S = --------------------- ------------- ;( = 0.9 ) fC R fC R 2 The capacitance CP should be chosen in the range of: C S / 20 C P C S / 10 The stabilization delays shown in Table 18 are dependant on PLL operational settings and external component selection (for example, crystal, XFC filter). 15 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.8.2.1 Jitter Information The basic functionality of the PLL is shown in Figure 3. With each transition of the clock fcmp, the deviation from the reference clock fref is measured and input voltage to the VCO is adjusted accordingly. The adjustment is done continuously with no abrupt changes in the clock output frequency. Noise, voltage, temperature and other factors cause slight variations in the control loop resulting in a clock jitter. This jitter affects the real minimum and maximum clock periods as illustrated in Figure 4. It is important to note that the pre-scaler used by timers and serial modules will eliminate the effect of PLL jitter to a large extent. 0 1 2 3 N-1 N tMIN1 tNOM Freescale Semiconductor, Inc... tMAX1 tMIN(N) tMAX(N) Figure 4. Jitter Definitions The relative deviation of tNOM is at its maximum for one clock period, and decreases towards zero for larger number of clock periods (N). Thus, jitter is defined as: t MAX ( N ) t MIN ( N ) J ( N ) = max 1 - -------------------- , 1 - -------------------- - Nt Nt NOM NOM For N < 100, the following equation is a good fit for the maximum jitter: j1 J ( N ) = ------- + j 2 N J(N) 01 5 10 15 20 N Figure 5. Maximum Bus Clock Jitter Approximation 16 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.8.3 Num C J1 J2 J3 J4 J5 J6 J7 J8 PLL Characteristics Table 18. PLL Characteristics Rating PLL reference frequency, crystal oscillator range 1 Symbol fREF fSCM fVCO |trk| |Lock| |unl| |unt| tstab tacq tal | ich | | ich | K1 f1 j1 j2 Min 0.5 1 8 3 0 0.5 6 -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- -- -- 0.5 4 0.3 0.2 5 5 Max 16 5.5 40 4 1.5 2.5 8 35 1 2 4 4 Unit MHz MHz MHz %2 %2 %2 %2 ms ms ms A A MHz/V MHz %4 %4 P Self Clock Mode frequency D VCO locking range D Lock Detector transition from Acquisition to Tracking mode D Lock Detection D Un-Lock Detection D Lock Detector transition from Tracking to Acquisition mode C PLLON Total Stabilization delay (Auto Mode) 3 D PLLON Acquisition mode stabilization delay D PLLON Tracking mode stabilization delay D Charge pump current acquisition mode D Charge pump current tracking mode D Jitter fit VCO loop gain parameter D Jitter fit VCO loop frequency parameter C Jitter fit parameter 1 C Jitter fit parameter 2 3 3 Freescale Semiconductor, Inc... J9 J10 J11 J12 J13 J14 J15 J16 1 2 38.5 3.5 -100 60 -- -- -- -- -- -- TBD TBD VDDPLL at 2.5 V. Percentage deviation from target frequency 3 PLL stabilization delay is highly dependent on operational requirement and external component values (for example, crystal and XFC filter component values). Notes 4 and 5 show component values for a typical configurations. Appropriate XFC filter values should be chosen based on operational requirement of system. 4f REF = 4 MHz, fSYS = 25 MHz (REFDV = 0x03, SYNR = 0x01), CS = 4.7 nF, CP = 470 pF, RS = 10 K. 5f REF = 4 MHz, fSYS = 8 MHz (REFDV = 0x00, SYNR = 0x01), CS = 33 nF, CP = 3.3 nF, RS = 2.7 K. 3.8.4 Crystal Monitor Time-out Table 19. Crystal Monitor Time-Outs Min 6 Typ 10 Max 18.5 Unit s The time-out Table 19 shows the delay for the crystal monitor to trigger when the clock stops, either at the high or at the low level. The corresponding clock period with an ideal 50% duty cycle is twice this time-out value. 3.8.5 Clock Quality Checker Table 20. CRG Maximum Clock Quality Check Timings Clock Check Windows Check Window Timeout Window Value 9.1 to 20.0 0.46 to 1.0 Unit ms s The timing for the clock quality check is derived from the oscillator and the VCO frequency range in Table 18. These numbers define the upper time limit for the individual check windows to complete. 17 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.8.6 Startup Table 21 summarizes several startup characteristics explained in this section. Refer to the MAC7100 Microcontroller Family Reference Manual (MAC7100RM/D) for a detailed description of the startup behavior. Table 21. CRG Startup Characteristics Num C K1 K2 K3 K4 K5 K6 T POR release level T POR assert level D Reset input pulse width, minimum input time D Startup from Reset D Interrupt pulse width, IRQ edge-sensitive mode D Wait recovery startup time Rating Symbol VPORR VPORA PWRSTL nRST PWIRQ tWRS Min -- 0.97 2 192 20 -- Typ -- -- -- -- -- -- Max 2.07 -- -- 196 -- 14 Unit V V tosc nosc ns tcyc Freescale Semiconductor, Inc... 3.8.6.1 Power On and Low Voltage Reset (POR and LVR) The release level VPORR and the assert level VPORA are derived from the VDD2.5 supply. The assert level VLVRA is derived from the VDD2.5 supply. They are also valid if the device is powered externally. After releasing the POR or LVR reset, the oscillator and the clock quality check are started. If after a time tCQOUT no valid oscillation is detected, the MCU will start using the internal self-generated clock. The fastest startup time possible is given by tuposc (refer to Table 17). 3.8.6.2 SRAM Data Retention The SRAM contents integrity is guaranteed if the PORF bit in the CRGFLG register is not set following a reset operation. 3.8.6.3 External Reset When external reset is asserted for a time greater than PWRSTL, the CRG module generates an internal reset and the CPU starts fetching the reset vector without doing a clock quality check, if there was stable oscillation before reset. 3.8.6.4 Stop Recovery The MCU can be returned to run mode from the stop mode by an external interrupt. A clock quality check is performed in the same manner as for POR before releasing the clocks to the system. 3.8.6.5 Pseudo Stop and Doze Recovery Recovery from pseudo stop and doze modes are essentially the same, since the oscillator is not stopped in either mode. The controller is returned to run mode by internal or external interrupts or other wakeup events in the system. After twrs, the CPU fetches an interrupt vector if the wakeup event was an interrupt, or continues to execute code if the wakeup event was not an interrupt. 18 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.9 External Bus Timing Specifications NOTE All processor bus timings are synchronous; that is, input setup/hold and output delay with respect to the rising edge of a reference clock. The reference clock is the CLKOUT output. All other timing relationships can be derived from these values. Table 22. External Bus Input Timing Specifications Table 22 lists processor bus input timings, which are shown in Figure 6, Figure 7 and Figure 8. Num L1 C CLKOUT Rating 1 Symbol tCYC Min 23 13 0 9 0 Max -- -- -- -- -- Unit ns ns ns ns ns Freescale Semiconductor, Inc... Control Inputs L2a L3a L4 L5 1 2 Control input valid to CLKOUT high 2 Data Inputs tCVCH tCHCII tDIVCH tCHDII CLKOUT high to control inputs invalid 2 Data input (DATA[15:0]) valid to CLKOUT high CLKOUT high to data input (DATA[15:0]) invalid Timing specifications have been indicated taking into account the full drive strength for the pads. TA pins are being referred to as control inputs. CLKOUT(45MHz) tSETUP 1.5 V tHOLD Input Setup & Hold Invalid 1.5 V Valid 1.5 V Invalid Input Rise Time VH = VIH VL = VIL tRISE = 1.5 ns Input Fall Time VH = VIH VL = VIL tFALL = 1.5 ns CLKOUT L4 L5 Inputs Figure 6. General Input Timing Requirements 19 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.9.1 Read and Write Bus Cycles Table 23. External Bus Output Timing Specifications Table 23 lists processor bus output timings. Read/write bus timings listed in Table 23 are shown in Figure 7 and Figure 8. Num C Rating Control Outputs 1 2 Symbol Min Max Unit L6a L6b L6c CLKOUT high to chip selects valid tCHCV tCHBV tCHOV tCHCOI tCHCI tCHAV tCHAI -- -- -- 0.5tCYC + 2 0.5tCYC + 2 -- 2 0.5tCYC + 10 0.5tCYC + 10 0.5tCYC + 10 -- -- 10 -- ns ns ns ns ns ns ns CLKOUT high to byte select (BS[1:0]) valid CLKOUT high to output select (OE) valid 3 Freescale Semiconductor, Inc... L7a L7b L8 L9 CLKOUT high to control output (BS[1:0], OE) invalid CLKOUT high to chip selects invalid CLKOUT high to address (ADDR[21:0]) and control (R/W) valid CLKOUT high to address (ADDR[21:0]) and control (R/W) invalid Data Outputs CLKOUT high to data output (DATA[15:0]) valid CLKOUT high to data output (DATA[15:0]) invalid CLKOUT high to data output (DATA[15:0]) high impedance Address and Attribute Outputs L10 L11 L12 1 2 3 tCHDOV tCHDOI tCHDOZ -- 2 -- 13 -- 9 ns ns ns CSn transitions after the falling edge of CLKOUT. BSn transitions after the falling edge of CLKOUT. OE transitions after the falling edge of CLKOUT. 20 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. S0 S1 S2 S3 S4 S5 S0 S1 S2 S3 S4 S5 CLKOUT L6a L7b L6a L7b CSn L8 L8 L9 ADDR[21:0] L6c L7a L1 OE Freescale Semiconductor, Inc... L8 L9 R/W L6b L7a L6b L7a BS[1:0] L10 L4 L11 DATA[15:0] L5 L12 TA (H) Figure 7. Read/Write (Internally Terminated) Bus Timing 21 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. S0 S1 S2 S3 S4 S5 S0 S1 CLKOUT L6a L7b CSn L8 L9 ADDR[21:0] L6c L7a OE Freescale Semiconductor, Inc... R/W L6b L7a BS[1:0] L4 L5 DATA[15:0] L2a L3a TA Figure 8. Read Bus Cycle Terminated by TA 22 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.10 Analog-to-Digital Converter Characteristics Table 24 and Table 25 show conditions under which the ATD operates. The following constraints exist to obtain full-scale, full range results: VSSA VRL VIN VRH VDDA. This constraint exists because the sample buffer amplifier cannot drive beyond the ATD power supply levels. If the input level goes outside of this range it will effectively be clipped. Table 24. ATD Operating Characteristics in 5 V Range Conditions shown in Table 6 unless otherwise noted Num C M1 M2 D Reference Potential C Differential Reference Voltage 1 D ATD Clock Frequency Cycles 2 Rating Low High Symbol VRL VRH VRH - VRL fATDCLK Min VSSA VDDA / 2 4.50 0.5 14 7 12 6 -- -- -- Typ -- -- 5.00 -- -- -- -- -- -- -- -- Max VDDA / 2 VDDA 5.25 2.0 28 14 26 13 20 0.375 0.750 Unit V V V MHz Cycles s Cycles s s mA mA Freescale Semiconductor, Inc... M3 M4 M5 M6 M7 M8 1 2 D ATD 10-bit Conversion PeriodClock NCONV10 @ 2.0MHz fATDCLK TCONV10 D ATD 8-bit Conversion PeriodClock Cycles 2 @ 2.0MHz fATDCLK D Recovery Time (VDDA = 5.0 V) P Reference Supply current 1 ATD module enabled P Reference Supply current 2 ATD modules enabled NCONV8 TCONV8 tREC IREF IREF Full accuracy is not guaranteed when differential voltage is less than 4.50 V Minimum time assumes final sample period of 2 ATD clocks; maximum time assumes final sample period of 16 ATD clocks. Table 25. ATD Operating Characteristics in 3.3 V Range Conditions shown in Table 6, with VDDX = 3.3 V 10% and a temperature maximum of +140C unless otherwise noted. Num C N1 N2 N3 N4 N5 N6 N7 N8 1 2 Rating Low High Symbol VRL VRH VRH-VRL fATDCLK Cycles 2 Min VSSA VDDA / 2 3.0 0.5 14 7 12 6 -- -- -- Typ -- -- 3.3 -- -- -- -- -- -- -- -- Max VDDA / 2 VDDA 3.6 2.0 28 14 26 13 20 0.375 0.250 Unit V V V MHz Cycles s Cycles s s mA mA D Reference Potential C Differential Reference Voltage 1 D ATD Clock Frequency D ATD 10-bit Conversion PeriodClock NCONV10 Conv, Time at 2.0MHz ATD Clock fATDCLK TCONV10 D ATD 8-bit Conversion PeriodClock Cycles 2 Conv, Time at 2.0MHz ATD Clock fATDCLK D Recovery Time (VDDA=5.0 V) P Reference Supply current 1 ATD module enabled P Reference Supply current 2 ATD modules enabled NCONV8 TCONV8 tREC IREF IREF Full accuracy is not guaranteed when differential voltage is less than 3.0 V Minimum time assumes final sample period of 2 ATD clocks; maximum time assumes final sample period of 16 ATD clocks. 3.10.1 Factors Influencing Accuracy Three factors -- source resistance, source capacitance and current injection -- have an influence on the accuracy of the ATD. 23 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.10.1.1 Source Resistance Due to the input pin leakage current as specified in Table 15 in conjunction with the source resistance there will be a voltage drop from the signal source to the ATD input. The maximum specified source resistance RS, results in an error of less than 1/2 LSB (2.5 mV) at the maximum leakage current. If the device or operating conditions are less than the worst case, or leakage-induced errors are acceptable, larger values of source resistance are allowed. 3.10.1.2 Source Capacitance When sampling, an additional internal capacitor is switched to the input. This can cause a voltage drop due to charge sharing with the external capacitance and the pin capacitance. For a maximum sampling error of the input voltage 1 LSB, then the external filter capacitor must be calculated as, Cf 1024 x (CINS - CINN). Freescale Semiconductor, Inc... 3.10.1.3 Current Injection There are two cases to consider: 1. A current is injected into the channel being converted. The channel being stressed has conversion values of 0x3FF (0xFF in 8-bit mode) for analog inputs greater than VRH and 0x000 for values less than VRL unless the current is higher than specified as disruptive condition. 2. Current is injected into pins in the neighborhood of the channel being converted. A portion of this current is picked up by the channel (coupling ratio K), This additional current impacts the accuracy of the conversion depending on the source resistance. The additional input voltage error on the converted channel can be calculated as VERR = K x RS x IINJ, with IINJ being the sum of the currents injected into the two pins adjacent to the converted channel. Table 26. ATD Electrical Characteristics Conditions are shown in Table 6 unless otherwise noted Num C P1 P2 Rating Symbol RS CINN CINS INA Kp Kn Min -- -- -- -2.5 -- -- Typ -- -- -- -- -- -- Max 1 10 22 2.5 TBD TBD Unit K pF pF mA A/A A/A C Max input Source Resistance T Total Input Capacitance Non Sampling Sampling C Disruptive Analog Input Current C Coupling Ratio positive current injection C Coupling Ratio negative current injection P3 P4 P5 24 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.10.2 ATD Accuracy Table 27 and Table 28 specify the ATD conversion performance excluding any errors due to current injection, input capacitance and source resistance. Table 27. ATD Conversion Performance in 5 V Range Conditions shown in Table 6 unless otherwise noted. VREF = VRH - VRL = 5.12 V, resulting in one 8 bit count = 20 mV and one 10 bit count = 5 mV fATDCLK = 2.0 MHz, 4.5 V VDDA 5.5 V Num C Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 1 Rating Symbol LSB DNL INL AE LSB DNL INL AE Min -- -1 -2.5 -3 -- -0.5 -1.0 -1.5 Typ 5 -- 1.5 2.0 20 -- 0.5 1.0 Max -- 1 2.5 3 -- 0.5 1.0 1.5 Unit mV Counts Counts Counts mV Counts Counts Counts P 10-bit Resolution P 10-bit Differential Nonlinearity P 10-bit Integral Nonlinearity P 10-bit Absolute Error 1 P 8-bit Resolution P 8-bit Differential Nonlinearity P 8-bit Integral Nonlinearity P 8-bit Absolute Error 1 Freescale Semiconductor, Inc... These values include the quantization error which is inherently 1/2 count for any A/D converter. Table 28. ATD Conversion Performance in 3.3 V Range Conditions shown in Table 6 unless otherwise noted. VREF = VRH - VRL = 5.12 V, resulting in one 8 bit count = 20 mV and one 10 bit count = 5 mV fATDCLK = 2.0 MHz, 4.5 V VDDA 5.5 V Num C R1 R2 R3 R4 R5 R6 R7 R8 1 Rating Symbol LSB DNL INL AE LSB DNL INL AE Min -- -1.5 -3.5 -5 -- -0.5 -1.5 -1.5 Typ 3.25 -- 1.5 2.0 13 -- 1.0 1.0 Max -- 1.5 3.5 5 -- 0.5 1.5 1.5 Unit mV Counts Counts Counts mV Counts Counts Counts P 10-bit Resolution P 10-bit Differential Nonlinearity P 10-bit Integral Nonlinearity P 10-bit Absolute P 8-bit Resolution P 8-bit Differential Nonlinearity P 8-bit Integral Nonlinearity P 8-bit Absolute Error 1 Error 1 These values include the quantization error which is inherently 1/2 count for any A/D converter. For the following definitions see also Figure 8. Differential Non-Linearity (DNL) is defined as the difference between two adjacent switching steps. Vi - Vi - 1 DNL ( i ) = ----------------------- - 1 1 LSB The Integral Non-Linearity (INL) is defined as the sum of all DNLs: n INL ( n ) = DNL ( i ) i=1 Vn - V0 = ------------------ - n 1 LSB 25 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 10-bit Absolute Error Boundary 0x3FF 0x3FE 0x3FD 0x3FC 0x3FB 0x3FA 0x3F9 0x3F8 0x3F7 10-bit Resolution 0x3F6 0x3F5 0x3F4 0x3F3 9 8 7 6 5 4 3 2 1 0 0 5 10 15 20 25 30 35 40 50 5055 5065 5075 5085 5095 5105 5115 5060 5070 5080 5090 5100 5110 5120 8-bit Transfer Curve VIN mV 10-bit Transfer Curve 1 Ideal Transfer Curve 2 0xFD 0xFE VI-1 LSB VI DNL 8-bit Absolute Error Boundary 0xFF Freescale Semiconductor, Inc... Figure 9. ATD Accuracy Definitions NOTE Figure 8 shows only definitions, for specification values refer to Table 27. 26 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA 8-bit Resolution Electrical Characteristics Freescale Semiconductor, Inc. 3.10.3 ATD Electrical Specifications Table 29 lists the DC electrical characteristics for the ATD module. Table 27 lists the analog-to-digital conversion performance specifications. Table 29. ATD Electrical Characteristics (Operating) 1 Num C S1 S2 S3 S4 S5 S6 Rating Reference Potential Low High Voltage Difference VRH - VRL 3 Analog Input Voltage Digital Input Voltage Analog Supply Current Run High Low -40C 4 25C 4 85C 4 105C 4 125C 4 S8 Pseudo Stop -40C 4 25C 4 85C 4 105C 4 125C 4 S9 Stop -40C 4 25C 4 85C 4 105C 4 125C 4 S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 1 2 3 4 5 2 Symbol VRL VRH VRH - VRL VINDC VIH VIL IDDArun Min VSSA VDDA / 2 4.5 -0.3 0.7 x VDDA VSSA - 0.3 -- -- -- -- -- Typ -- -- -- -- -- -- TBD TBD TBD TBD TBD TBD 17 TBD TBD TBD TBD 17 TBD TBD TBD 200 -- -- -- -- -- -- -- -- -- Max VDDA / 2 VDDA 5.5 VDDA + 0.3 VDDA + 0.3 0.2 x VDDA TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD 250 2 200 10 15 3 10-4 1 1 5 Unit V V V V V V mA mA mA mA mA A A A A A A A A A A A mA nA pF pF mA A/A Counts Counts pF Freescale Semiconductor, Inc... S7 IDDApseudo_stop -- -- -- -- -- IDDAstop -- -- -- -- -- (low power) Reference Supply Current Input Injection Current 5 Input Current, Off Channel 6 Total Input Capacitance Coupling Ratio 8 Not Sampling Sampling IREF IINJ IOFF CINN CINS INA K -- -- -200 -- -- -3 -- -- -- Disruptive Analog Input Current 7 Incremental Error due to injection current (All channels with 10k < Rs < 100k)9 Incremental Error due to injection current (Channel under test Rs=10k, IINJ=3mA) 9 Incremental Capacitance during Sampling 10 CSAMP -- All voltages referred to VSSA, -40 to 125oC, VDDA = 5.0 V 10% and 2.0 MHz conversion rate unless otherwise noted. Refer to Table 6 for additional operating conditions. To obtain full-scale, full-range results, VSSA < VRL < VINDC < VRH < VDDA. Sample buffer amp cannot drive beyond the power supply levels. If the input level goes outside of this range, it will effectively be clipped. Full accuracy is not guaranteed when the differential reference voltage is less than 4.5 V. 85C, 105C, and 125C refer to the "C", "V", and "M" Temperature Options, respectively. The input injection current is specified to 1 count of error. 27 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics 6 7 Freescale Semiconductor, Inc. 8 9 10 Maximum leakage occurs at maximum operating temperature. Current decreases by approximately one-half for each 8 to 12 C, in the ambient temperature range of 50 to 125 C. Below disruptive current conditions, the channel being stressed has conversion values of 0x3FF for analog inputs greater than VRH and 0x000 for values less than VRL. This assumes that VDDA AVRH and VRL VSSA due to the presence of the sample amplifier. Other channels are not affected by non-disruptive conditions. Coupling Ratio, K, is defined as the ratio of the output current, IOUT, measured on the pin under test to the injection current, IINJ, when both adjacent pins are overstressed with the specified injection current. K = IOUT / IINJ. The input voltage error on the channel under test is calculated as Verr = IINJ x K x RS. Total injection current is determined by the number of channels injecting (for example, 15), external injection voltage (VINJ - VPOSCLAMP, or VINJ - VNEGCLAMP), and the external source impedance, Rs, wherein all input channels have the same values. To determine the error voltage on the converted channel, only the two adjacent channels are expected to contribute to the error voltage: Verrj = (VINJ - VCLAMP) x K x 2. For a maximum sampling error of the input voltage 1LSB, then the external filter capacitor, Cf 1024 x CSAMP. The value of CSAMP in the new design may be reduced, or increased slightly. Freescale Semiconductor, Inc... Table 30. ATD Performance Specifications 1 Num C T1 T2 T3 T4 T5 1 2 Rating Symbol LSB DNL INL AE RS Min -- -1 -2 -2.5 -- Typ 5 -- -- -- -- Max -- 1 2 2.5 100 Unit mV Counts Counts Counts k D 10-bit Resolution D 10-bit Differential Nonlinearity 2 D 10-bit Integral Nonlinearity 2 D 10-bit Absolute Error 2, 3 D Max input Source Impedance 4 All voltages referred to VSSA, VDDA = 5.0 V10%, ATD clock = 2.1 Mhz., -40 to 125 C. Note: 1 LSB = 1 Count (At VREF = 5.12 V, one 8 bit count = 20 mV, one 10-bit count = 5 mV) 3 These values include quantization error which is inherently 1/2 count for any A/D converter. 4 This value is based on error attributed to the specified leakage value of TBD nA resulting in an error of less than 1/2 LSB (2.5 mV). If operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source resistance is allowable. 3.10.4 ATD Timing Specifications Table 31. ATD Timing Specifications Num C U1 U2 U3 U4 Rating Symbol Fclk Fatdclk Clock Cycles Conv. Time NCONV10* TCONV10 TSR Min -- 0.5 14* 7 -- Typ -- -- -- -- -- Max 25.0 2.0 28* 14 100 Unit MHz MHz Cycles* sec sec D ATD Module Clock Frequency D ATD Conversion Clock Frequency D ATD 10-bit Conversion Period* D Stop Recovery Time (VDDA = 5.0 V) Table 32. ATD External Trigger Timing Specifications Num V1 C Parameter Symbol TPERIOD tPW tLR tDLY Min -- Max 1 sample + 1 conv. + 1 ATD clock -- -- 2 Unit CYCLE D ETRIG Minimum Period V2 V3 V4 1 D ETRIG Minimum Pulse Width D ETRIG Level Recovery 1 D Conversion Start Delay 2 1 -- SYS CLK SYS CLK SYS CLK Time prior to end of conversion that the ETRIG pin must be deactivated so that another conversion sequence does not start. 28 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. tPW Edge Sensitive Falling Edge Active Coversion Activity ETRIG tDLY ADx Max Frequency Level Sensitive Low Active Sequence Complete Flag ETRIG ASCIF tDLY ADx Max Frequency ETRIG tLR ASCIF tDLY ADx tDLY tPW tDLY tPERIOD Freescale Semiconductor, Inc... Coversion Activity Level Sensitive Low Active Sequence Complete Flag Coversion Activity Figure 10. ATD External Trigger Timing Diagram 29 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.11 Serial Peripheral Interface Electrical Specifications 3.11.1 Master Mode Figure 11 and Figure 12 illustrate master mode timing. Timing values are shown in Table 33. Table 33. SPI Master Mode Timing Characteristics 1 Conditions are shown in Table 6 unless otherwise noted, CLOAD = 200pF on all outputs Num C Rating Symbol fop tsck tlead tlag twsck tsu thi tv tho tr tf Min DC 4 1/2 1/2 tbus - 30 25 0 -- 0 -- -- Typ -- -- -- -- -- -- -- -- -- -- -- Max 1/4 2048 -- -- 1024 tbus -- -- 25 -- 25 25 Unit fbus tbus tsck tsck ns ns ns ns ns ns ns W1a P Operating Frequency W1b P SCK Period tsck = 1/fop Freescale Semiconductor, Inc... W2 W3 W4 W5 W6 W9 D Enable Lead Time D Enable Lag Time D Clock (SCK) High or Low Time D Data Setup Time (Inputs) D Data Hold Time (Inputs) D Data Valid (after Enable Edge) W10 D Data Hold Time (Outputs) W11 D Rise Time Inputs and Outputs W12 D Fall Time Inputs and Outputs 1 The numbers 7, 8 in the column labeled "Num" are missing. This has been done on purpose to be consistent between the Master and the Slave timing shown in Table 34. 3.11.2 Slave Mode Figure 13 and Figure 14 illustrate the slave mode timing. Timing values are shown in Table 34. Table 34. SPI Slave Mode Timing Characteristics Conditions are shown in Table 6 unless otherwise noted, CLOAD = 200pF on all outputs Num C Rating Symbol fop tsck tlead tlag twsck tsu thi ta tdis tv tho tr tf Min DC 4 1 1 tcyc - 30 25 25 -- -- -- 0 -- -- Typ -- -- -- -- -- -- -- -- -- -- -- -- -- Max 1/4 2048 -- -- -- -- -- 1 1 25 -- 25 25 Unit fbus tbus tcyc tcyc ns ns ns tcyc tcyc ns ns ns ns X1a P Operating Frequency X1b P SCK Period tsck = 1/fop X2 X3 X4 X5 X6 X7 X8 X9 D Enable Lead Time D Enable Lag Time D Clock (SCK) High or Low Time D Data Setup Time (Inputs) D Data Hold Time (Inputs) D Slave Access Time D Slave SIN Disable Time D Data Valid (after SCK Edge) X10 D Data Hold Time (Outputs) X11 D Rise Time Inputs and Outputs X12 D Fall Time Inputs and Outputs 30 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. PCSx (OUTPUT) W2 W11 W1b W3 SCK (CPOL = 0) (OUTPUT) SCK (CPOL = 1) (OUTPUT) W5 W4 W4 W12 W6 SIN (INPUT) MSB In 2 W9 Bit 6 ... 1 W9 LSB In W10 Freescale Semiconductor, Inc... SOUT (OUTPUT) 1 2 MSB Out 2 Bit 6 ... 1 LSB Out If configured as output. LSBFE = 0. For LSBFE = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure 11. SPI Master Timing (CPHA = 0) PCSx (OUTPUT) W2 W11 W1b W12 W3 SCK (CPOL = 0) (OUTPUT) SCK (CPOL = 1) (OUTPUT) W4 W4 W11 W12 W5 W6 SIN (INPUT) MSB In 2 W9 Bit 6 ... 1 W10 LSB In SOUT (OUTPUT) 1 2 Port Data Master MSB Out 2 Bit 6 ... 1 Master LSB Out Port Data If configured as output. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure 12. SPI Master Timing (CPHA =1) 31 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. SS (INPUT) X2 X11 X1b X12 X3 SCK (CPOL = 0) (INPUT) SCK (CPOL = 1) (INPUT) X7 X4 X4 X11 X12 X10 X9 X10 X8 SOUT (OUTPUT) Slave MSB Out X5 X6 Bit 6 ... 1 Slave LSB Out Freescale Semiconductor, Inc... SIN (INPUT) MSB In Bit 6 ... 1 LSB In Figure 13. SPI Slave Timing (CPHA = 0) SS (INPUT) X2 X11 X1b X12 X3 SCK (CPOL = 0) (INPUT) SCK (CPOL = 1) (INPUT) X9 X7 X4 X4 X11 X12 X8 X10 SOUT (OUTPUT) Slave MSB Out X5 X6 Bit 6 ... 1 Slave LSB Out SIN (INPUT) MSB In Bit 6 ... 1 LSB In Figure 14. SPI Slave Timing (CPHA =1) 32 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.12 FlexCAN Electrical Specifications Table 35. FlexCAN Wake-up Pulse Characteristics Conditions are shown in Table 6 unless otherwise noted Num C Y1 Y2 Rating Symbol tWUP tWUP Min -- 5 Typ -- -- Max 2 -- Unit s s P FlexCAN Wake-up dominant pulse filtered P FlexCAN Wake-up dominant pulse passed 3.13 Program Flash and Data Flash Timing Characteristics Freescale Semiconductor, Inc... NOTE Unless otherwise noted the abbreviation NVM (Non-Volatile Memory) is used for both program Flash and data Flash. 3.13.1 NVM timing The time base for all NVM program or erase operations is derived from the system clock divided by two (Fsys/2). A minimum system frequency fNVMfsys is required for performing program or erase operations. The NVM modules do not have any means to monitor the frequency and will not prevent program or erase operation at frequencies above or below the specified minimum. Attempting to program or erase the NVM modules at a lower frequency a full program or erase transition is not assured. The Flash and Data Flash program and erase operations are timed using a clock derived from the system frequency using the CFMCLKD register. The frequency of this clock must be set within the limits specified as fNVMOP. The minimum program and erase times shown in Table 36 are calculated for maximum fNVMOP and maximum fbus. The maximum times are calculated for minimum fNVMOP and a fbus of 2 MHz. 3.13.1.1 Single Word Programming The programming time for single word programming is dependant on the bus frequency as a well as on the frequency fNVMOP and can be calculated according to the following formula. 1 1t swpgm = 9 ----------------- + 25 -------f NVMOP f bus 3.13.1.2 Burst Programming This applies only to the Flash where up to 32 words in a row can be programmed consecutively using burst programming by keeping the command pipeline filled. The time to program a consecutive word can be calculated as: 11t bwpgm = 4 ----------------- + 9 -------f NVMOP f bus t brpgm = t swpgm + 31 t bwpgm The time to program a whole row is: Burst programming is more than 2 times faster than single word programming. 33 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.13.1.3 Sector Erase Erasing a 4k byte Flash sector takes: 1t era 4000 ----------------f NVMOP The setup time can be ignored for this operation. 3.13.1.4 Mass Erase Erasing a NVM block takes: 1t mass 20000 ----------------f NVMOP The setup time can be ignored for this operation. Freescale Semiconductor, Inc... 3.13.1.5 Blank Check The time it takes to perform a blank check on the Flash or Data Flash is dependant on the location of the first non-blank word starting at relative address zero. It takes one bus cycle per word to verify plus a setup of the command. t check location t cyc + 10 t cyc Table 36. NVM Timing Characteristics 1 Num C Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 Z9 1 2 3 4 Rating Symbol fNVMfsys fNVMOP tswpgm tbwpgm tbrpgm tera tmass tcheck tcheck Min 0.5 1 150 46 3 20.4 20 5 100 5 11 6 3 3 Typ -- -- -- -- -- -- -- -- -- -- Max 50 2 -- 200 74.5 4 31 4 1035.5 26.7 4 4 Unit MHz MHz kHz s s s ms ms 7 D System Clock/2 D Operating Frequency P Single Word Programming Time D Flash Burst Programming consecutive word D Flash Burst Programming Time for 32 Words P Sector Erase Time P Mass Erase Time D Blank Check Time Flash per block D Bus frequency for Programming or Erase Operations fNVMBUS 678.4 133 4 32778 2058 7 tcyc tcyc Z10 D Blank Check Time Data Flash per block 11 6 5 6 7 Conditions are shown in Table 6 unless otherwise noted Restrictions for oscillator in crystal mode apply! Minimum programming times are achieved under maximum NVM operating frequency fNVMOP and maximum bus frequency fbus. Maximum erase and programming times are achieved under particular combinations of fNVMOP and bus frequency fbus. Refer to formulae in Section 3.13.1.1, "Single Word Programming," through Section 3.13.1.4, "Mass Erase," for more information. Minimum erase times are achieved under maximum NVM operating frequency fNVMOP. Minimum time, if first word in the array is not blank Maximum time to complete check on an erased block 34 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Electrical Characteristics Freescale Semiconductor, Inc. 3.13.2 NVM Reliability The reliability of the NVM blocks is guaranteed by stress test during qualification, constant process monitors and burn-in to screen early life failures. The failure rates for data retention and program/erase cycling are specified at the operating conditions noted. The program/erase cycle count on the sector is incremented every time a sector or mass erase event is executed. Table 37. NVM Reliability Characteristics Conditions shown in Table 6 unless otherwise noted. Num Z10 Z11 C Rating Min 10,000 15 Unit Cycles Years C Program/Data Flash Program/Erase endurance (-40C to +125C) C Program/Data Flash Data Retention Lifetime Freescale Semiconductor, Inc... NOTE All values shown in Table 37 are target values and subject to characterization. For Flash cycling performance, each Program operation must be preceded by an erase. 35 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Device Pin Assignments Freescale Semiconductor, Inc. 4 Device Pin Assignments The MAC7100 Family is available in 208-pin ball grid array (MAP BGA), 144-pin low profile quad flat (LQFP), 112-pin LQFP, and 100-pin LQFP package options. The family of devices offer pin-compatible packaged devices to assist with system development and accommodate a direct application enhancement path. Refer to Table 1 for a comparison of the peripheral sets and package options for each device. Most pins perform two or more functions, which is described in more detail in the MAC7100 Microcontroller Family Reference Manual (MAC7100RM/D). Figure 15, Figure 16, Figure 17, Figure 18, and Figure 19 show the pin assignments for the various packages. 4.1 MAC7141PV Pin Assignments PG3 / TXD_A PG2 / RXD_A PG1 / TXD_B PG0 / RXD_B TMS TCK TDO TDI VDD2.5 VSS2.5 PD10 PD9 PD8 PD7 PD6 PE15 / AN15_A PE14 / AN14_A PE13 / AN13_A PE12 / AN12_A PE11 / AN11_A PE10 / AN10_A VSSA VRL VRH VDDA / / / / PG4 PG5 PG6 PG7 VSSX VDDX N/C PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PF15 PF14 PF13 PF12 PF11 PF10 PF9 PF8 PF7 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 Freescale Semiconductor, Inc... CNTX_A CNRX_A CNTX_B CNRX_B Figure 15. Pin Assignments for MAC7141 in 100-pin LQFP 36 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com eMIOS6 / PF6 eMIOS5 / PF5 eMIOS4 / PF4 eMIOS3 / PF3 eMIOS2 / PF2 NEXPR / eMIOS1 / PF1 NEXPS / eMIOS0 / PF0 RESET VSSX VDDX RXD_D / PG12 TXD_D / PG13 VDD2.5 VSS2.5 VSSR VDDR VDDPLL XFC VSSPLL EXTAL XTAL TEST PA15 MODB / PD0 MODA / PD1 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 SDA SCL SIN_A SOUT_A SCK_A SS_A / PCS0_A PCS1_A PCS2_A PCSS_A / PCS5_A eMIOS15 eMIOS14 eMIOS13 eMIOS12 eMIOS11 eMIOS10 eMIOS9 eMIOS8 eMIOS7 / / / / / / / / / / / / / / / / / / 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 MAC7141 100 LQFP 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 PE9 / AN9_A PE8 / AN8_A PE7 / AN7_A PE6 / AN6_A / RDY' PE5 / AN5_A / MSEO' PE4 / AN4_A / MDO1' PE3 / AN3_A / MDO0' PE2 / AN2_A / EVTI' PE1 / AN1_A / EVTO' PE0 / AN0_A / MCKO' PA7 PA8 PA9 VDDX VSSX PD4 / IRQ PD3 / XIRQ / XCLKS CLKOUT PB15 / SIN_B PB14 / SOUT_B PB13 / SCK_B PB12 / PCS1_B PB11 / PCS2_B PB10 / PCS5_B / PCSS_B PB9 / PCS0_B / SS_B MOTOROLA Device Pin Assignments Freescale Semiconductor, Inc. 4.2 MAC7121PV Pin Assignments PG3 / TXD_A PG2 / RXD_A PG1 / TXD_B PG0 / RXD_B PG15 / TXD_C PG14 / RXD_C PA0 TMS TCK TDO TDI VDD2.5 VSS2.5 PD10 PD9 PD8 PD7 PD6 PE15 / AN15_A PE14 / AN14_A PE13 / AN13_A PE12 / AN12_A PE11 / AN11_A PE10 / AN10_A VSSA VRL VRH VDDA CNTX_A CNRX_A CNTX_C CNRX_C CNTX_D CNRX_D CNTX_B CNRX_B 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 / / / / / / / / / / / / / / / / / / / / / / / / / / Freescale Semiconductor, Inc... Figure 16. Pin Assignments for MAC7121 in 112-pin LQFP 37 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com eMIOS6 / PF6 eMIOS5 / PF5 eMIOS4 / PF4 eMIOS3 / PF3 eMIOS2 / PF2 NEXPR / eMIOS1 / PF1 NEXPS / eMIOS0 / PF0 RESET VSSX VDDX RXD_D / PG12 TXD_D / PG13 VDD2.5 VSS2.5 VSSR VDDR VDDPLL XFC VSSPLL EXTAL XTAL TEST PA15 PA14 PA13 MODB / PD0 MODA / PD1 SS_B / PCS0_B / PB9 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 SDA SCL SIN_A SOUT_A SCK_A SS_A / PCS0 PCS1_A PCS2_A PCSS_A / PCS5_A eMIOS15 eMIOS14 eMIOS13 eMIOS12 eMIOS11 eMIOS10 eMIOS9 eMIOS8 eMIOS7 PG4 PG5 PG8 PG9 PG10 PG11 PG6 PG7 VSSX VDDX PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PF15 PF14 PF13 PF12 PF11 PF10 PF9 PF8 PF7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 MAC7121 112 LQFP 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 PE9 / AN9_A PE8 / AN8_A PE7 / AN7_A PE6 / AN6_A / RDY' PE5 / AN5_A / MSEO' PE4 / AN4_A / MDO1' PE3 / AN3_A / MDO0' PE2 / AN2_A / EVTI' PE1 / AN1_A / EVTO' PE0 / AN0_A / MCKO' PA7 PA8 PA9 PA10 PA11 PA12 PD5 PC15 VDDX VSSX PD4 / IRQ PD3 / XIRQ CLKOUT / XCLKS PB15 / SIN_B PB14 / SOUT_B PB13 / SCK_B PB12 / PCS1_B PB11 / PCS2_B MOTOROLA Device Pin Assignments Freescale Semiconductor, Inc. 4.3 MAC7101PV Pin Assignments PG3 / TXD_A PG2 / RXD_A PG1 / TXD_B PG0 / RXD_B PG15 / TXD_C PG14 / RXD_C MCKO PA0 / EVTO PA1 / EVTI PA2 / MDO0 PA3 / MDO1 PA4 / MSEO PA5 / RDY PA6 / TMS TCK TDO TDI VDD2.5 VSS2.5 VSSX VDDX PE15 / AN15_A PH15 / AN15_B PE14 / AN14_A PH14 / AN14_B PE13 / AN13_A PH13 / AN13_B PE12 / AN12_A PH12 / AN12_B PE11 / AN11_A PH11 / AN11_B PE10 / AN10_A VSSA VRL VRH VDDA 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 Freescale Semiconductor, Inc... CNTX_A CNRX_A CNTX_C CNRX_C CNTX_D CNRX_D CNTX_B CNRX_B SDA SCL SIN_A SOUT_A SCK_A SS_A / PCS0_A PCS1_A PCS2_A PCSS_A / PCS5_A eMIOS15 eMIOS14 eMIOS13 eMIOS12 Figure 17. Pin Assignments for MAC7101 in 144-pin LQFP 38 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com eMIOS6 eMIOS5 eMIOS4 eMIOS3 eMIOS2 NEXPR / eMIOS1 NEXPS / eMIOS0 / PF6 / PF5 / PF4 / PF3 / PF2 / PF1 / PF0 PC8 PC9 PC10 PC11 RESET VSSX VDDX RXD_D / PG12 TXD_D / PG13 VDD2.5 VSS2.5 VSSR VDDR VDDPLL XFC VSSPLL EXTAL XTAL TEST VSSX VDDX PA15 PA14 PA13 PD11 PD12 MODB / PD0 MODA / PD1 SS_B / PCS0_B / PB9 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 eMIOS11 eMIOS10 eMIOS9 eMIOS8 eMIOS7 / PG4 / PG5 / PG8 / PG9 / PG10 / PG11 / PG6 / PG7 / PC0 / PC1 / PC2 / PC3 VSSX VDDX / PB0 / PB1 / PB2 / PB3 / PB4 / PB5 / PB6 / PB7 / PB8 / PF15 / PF14 / PF13 / PF12 / PC4 / PC5 / PC6 / PC7 / PF11 / PF10 / PF9 / PF8 / PF7 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 MAC7101 144 LQFP 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 PH10 / AN10_B PE9 / AN9_A PH9 / AN9_B PE8 / AN8_A PH8 / AN8_B PE7 / AN7_A PH7 / AN7_B PE6 / AN6_A / RDY' PH6 / AN6_B PE5 / AN5_A / MSEO' PH5 / AN5_B PE4 / AN4_A / MDO1' PH4 / AN4_B PE3 / AN3_A / MDO0' PH3 / AN3_B PE2 / AN2_A / EVTI' PH2 / AN2_B PE1 / AN1_A / EVTO' PH1 / AN1_B PE0 / AN0_A / MCKO' PH0 / AN0_B VDDX VSSX PD15 PD14 PD13 PD4 / IRQ PD3 / XIRQ CLKOUT / XCLKS VSSX PB15 / SIN_B PB14 / SOUT_B PB13 / SCK_B PB12 / PCS1_B PB11 / PCS2_B PB10 / PCS5_B / PCSS_B MOTOROLA Device Pin Assignments Freescale Semiconductor, Inc. 4.4 MAC7111PV Pin Assignments PG3 / TXD_A PG2 / RXD_A PG1 / TXD_B PG0 / RXD_B PG15 / TXD_C PG14 / RXD_C PA0 / DATA0 / MCKO PA1 / DATA1 / EVTO PA2 / DATA2 / EVTI PA3 / DATA3 / MDO0 PA4 / DATA4 / MDO1 PA5 / DATA5 / MSEO PA6 / DATA6 / RDY TMS TCK TDO TDI VDD2.5 VSS2.5 VSSX VDDX PD10 / ADDR21 PD9 / ADDR20 PD8 / ADDR19 PD7 / ADDR18 PD6 / ADDR17 PE15 / AN15_A PE14 / AN14_A PE13 / AN13_A PE12 / AN12_A PE11 / AN11_A PE10 / AN10_A VSSA VRL VRH VDDA Freescale Semiconductor, Inc... Figure 18. Pin Assignments for MAC7111 in 144-pin LQFP 39 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com eMIOS6 / PF6 eMIOS5 / PF5 eMIOS4 / PF4 eMIOS3 / PF3 eMIOS2 / PF2 NEXPR / eMIOS1 / PF1 NEXPS / eMIOS0 / PF0 ADDR8 / PC8 ADDR9 / PC9 ADDR10 / PC10 ADDR11 / PC11 RESET VSSX VDDX RXD_D / PG12 TXD_D / PG13 VDD2.5 VSS2.5 VSSR VDDR VDDPLL XFC VSSPLL EXTAL XTAL TEST VSSX VDDX DATA15 / PA15 DATA14 / PA14 DATA13 / PA13 OE / PD11 / PD12 CS2 / PD0 MODB BS0 / PD1 MODA BS1 SS_B / PCS0_B / PB9 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 CNTX_A / PG4 CNRX_A / PG5 CNTX_C / PG8 CNRX_C / PG9 CNTX_D / PG10 CNRX_D / PG11 CNTX_B / PG6 CNRX_B / PG7 ADDR0 / PC0 ADDR1 / PC1 ADDR2 / PC2 ADDR3 / PC3 VSSX VDDX SDA / PB0 SCL / PB1 SIN_A / PB2 SOUT_A / PB3 SCK_A / PB4 SS_A / PCS0_A / PB5 PCS1_A / PB6 PCS2_A / PB7 PCSS_A / PCS5_A / PB8 eMIOS15 / PF15 eMIOS14 / PF14 eMIOS13 / PF13 eMIOS12 / PF12 ADDR4 / PC4 ADDR5 / PC5 ADDR6 / PC6 ADDR7 / PC7 eMIOS11 / PF11 eMIOS10 / PF10 eMIOS9 / PF9 eMIOS8 / PF8 eMIOS7 / PF7 144 143 142 141 140 139 138 137 136 135 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 MAC7111 144 LQFP 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 PE9 / AN9_A PE8 / AN8_A PE7 / AN7_A PE6 / AN6_A / RDY' PE5 / AN5_A / MSEO' PE4 / AN4_A / MDO1' PE3 / AN3_A / MDO0' PE2 / AN2_A / EVTI' PE1 / AN1_A / EVTO' PE0 / AN0_A / MCKO' PA7 / DATA7 PA8 / DATA8 PA9 / DATA9 PA10 / DATA10 PA11 / DATA11 PA12 / DATA12 PD5 / ADDR16 PC15 / ADDR15 PC14 / ADDR14 PC13 / ADDR13 PC12 / ADDR12 VDDX VSSX PD15 / R/W PD14 / CS0 PD13 / CS1 PD4 / IRQ PD3 / XIRQ CLKOUT / XCLKS TA PB15 / SIN_B PB14 / SOUT_B PB13 / SCK_B PB12 / PCS1_B PB11 / PCS2_B PB10 / PCS5_B / PCSS_B MOTOROLA Device Pin Assignments Freescale Semiconductor, Inc. 4.5 1 A B C D E VSSX VSSX PG5 PG9 PG6 PC0 PB0 PB3 PB5 PB7 PF14 PF12 PF11 PF9 PF7 VSSX MAC7131VF Pin Assignments 2 VSSX VSSX PG3 PG8 PG11 PG7 PC2 PB2 PB6 PB8 PF13 PC5 PF10 PF8 VSSX VSSX 3 PG0 PG2 VSSX PG4 PG10 PC1 PC3 PB1 PB4 PF15 PC4 PC6 PC7 VSSX PF6 PF4 4 PG14 PG15 PG1 VSSX VSSX VSSX VSSX VDDX VSSX VSSX VSSX VSSX VSSX PF5 PF3 PF2 VSSR PC8 PF1 PF0 VSSR VSS2.5 VSS2.5 VSSPLL VSSPLL VSSX PC10 PC9 VDDX VSS2.5 VDDR PG12 PG13 VSSX XFC VDDX VSSX PA15 TEST VSSX PD11 PA13 PA14 VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX VSSX 5 PA2 PA0 PA1 6 PA5 PA4 PA3 7 TCLK TMS PA6 8 TDI TDO 9 PE15 PD9 10 PE14 PH15 PD6 PD7 11 PH14 PE13 PH13 VSSA 12 PE12 PH12 PE11 VSSA 13 PH11 PE10 VDDA PH10 PE4 PE2 PH0 PA8 PD5 PC13 PD13 VSSX VSSX PD12 PD1 PD0 14 VRL PH9 PE8 PE9 PE5 PE3 PH1 PA9 PA12 PC12 PD14 TA PB11 VSSX PB10 PB9 15 VRH VDDA PE7 PE6 PH5 PH3 PE1 PA7 PA11 PC14 PD15 16 VDDA PH8 PH7 PH6 PH4 PH2 PE0 PA10 PC15 VDDX PD4 VSS2.5 VDDX PD8 VSSX VSS2.5 VSS2.5 PD10 Freescale Semiconductor, Inc... F G H J K L M N P R T PD3 CLKOUT PB14 PB12 VSSX VSSX PB15 PB13 VSSX VSSX PC11 RESET VSSPLL EXTAL XTAL Figure 19. Pin Assignments for MAC7131 in 208-pin MAP BGA 40 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Mechanical Information Freescale Semiconductor, Inc. 5 5.1 Mechanical Information 100-Pin LQFP Package L 60 61 41 40 S S B B P D L H A-B Freescale Semiconductor, Inc... B V 0.05 D M M C A-B -A- -B- S S D 0.20 0.20 -A-,-B-,-DDETAIL A DETAIL A 80 1 20 21 -D0.20 M F A H A-B S S D S 0.05 A-B 0.20 E C -CSEATING PLANE M J S N C A-B D S M D DETAIL C -HDATUM PLANE 0.20 M C A-B S D S VIEW ROTATED 90 SECTION B-B H G 0.10 M U T DATUM-HPLANE R K W X DETAIL C Q NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DATUMS -A-, -B- AND -D- TO BE DETERMINED AT DATUM PLANE -H-. 5. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE -C-. 6. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 7. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. DIM A B C D E F G H J K L M N P Q R S T U V W X MILLIMETERS MIN MAX 13.90 14.10 13.90 14.10 2.15 2.45 0.22 0.38 2.00 2.40 0.22 0.33 0.65 BSC --0.25 0.13 0.23 0.65 0.95 12.35 REF 5 10 0.13 0.17 0.325 BSC 0 7 0.13 0.30 16.95 17.45 0.13 --0 --16.95 17.45 0.35 0.45 1.6 REF Figure 20. 100-Pin LQFP Mechanical Dimensions (Case No. 983) 41 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Mechanical Information Freescale Semiconductor, Inc. 5.2 PIN 1 IDENT 112-Pin LQFP Package 4X 112 1 0.20 T L-M N 4X 28 TIPS 85 84 0.20 T L-M N J1 J1 C L 4X P VIEW Y 108X G X X=L, M OR N VIEW Y B L M V B1 Freescale Semiconductor, Inc... V1 J AA 28 29 56 57 F D 0.13 M BASE METAL N A1 S1 A S T L-M N ROTATED 90 COUNTERCLOCKWISE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS IN MILLIMETERS. 3. DATUMS L, M AND N TO BE DETERMINED AT SEATING PLANE, DATUM T. 4. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE, DATUM T. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 PER SIDE. DIMENSIONS A AND B INCLUDE MOLD MISMATCH. 6. DIMENSION D DOES NOT INCLUDE DIM A A1 B B1 C C1 C2 D E F G J K P R1 R2 S S1 V V1 Y Z AA 1 2 3 MILLIMETERS MIN MAX 20.000 BSC 10.000 BSC 20.000 BSC 10.000 BSC --- 1.600 0.050 0.150 1.350 1.450 0.270 0.370 0.450 0.750 0.270 0.330 0.650 BSC 0.090 0.170 0.500 REF 0.325 BSC 0.100 0.200 0.100 0.200 22.000 BSC 11.000 BSC 22.000 BSC 11.000 BSC 0.250 REF 1.000 REF 0.090 0.160 8 0 7 3 13 11 11 13 SECTION J1-J1 C2 C 0.050 2 VIEW AB 0.10 T 112X SEATING PLANE 3 T R R2 R1 0.25 GAGE PLANE R C1 (Y) VIEW AB (K) E (Z) 1 Figure 21. 112-Pin LQFP Mechanical Dimensions (Case No. 987) 42 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Mechanical Information Freescale Semiconductor, Inc. 5.3 4X 144-Pin LQFP Package 0.20 T L-M N 4X 36 TIPS 0.20 T L-M N PIN 1 IDENT 1 144 109 108 J1 L M B V 140X 4X P J1 C L X X=L, M OR N G Freescale Semiconductor, Inc... VIEW Y 36 37 72 73 B1 V1 NOTES: VIEW Y N A1 S1 A S VIEW AB C 2 2 T 0.1 T 144X 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. DIMENSIONS IN MILLIMETERS. 3. DATUMS L, M, N TO BE DETERMINED AT THE SEATING PLANE, DATUM T. 4. DIMENSIONS S AND V TO BE DETERMINED AT SEATING PLANE, DATUM T. 5. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.25 PER SIDE. DIMENSIONS A AND B DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE H. 6. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLWABLE DAMBAR PROTRUSION SHALL NOT CAUSE THE D DIMENSION TO EXCEED 0.35. MILLIMETERS DIM MIN MAX A 20.00 BSC A1 10.00 BSC B 20.00 BSC B1 10.00 BSC C 1.40 1.60 C1 0.05 0.15 C2 1.35 1.45 D 0.17 0.27 E 0.45 0.75 F 0.17 0.23 G 0.50 BSC J 0.09 0.20 K 0.50 REF P 0.25 BSC R1 0.13 0.20 R2 0.13 0.20 S 22.00 BSC S1 11.00 BSC V 22.00 BSC V1 11.00 BSC Y 0.25 REF Z 1.00 REF AA 0.09 0.16 0 1 0 7 2 11 13 SEATING PLANE PLATING J F AA C2 0.05 R2 R1 D 0.08 M BASE METAL 0.25 GAGE PLANE T L-M N (K) C1 (Y) VIEW AB E (Z) SECTION J1-J1 (ROTATED 90 ) 144 PL 1 Figure 22. 144-Pin LQFP Mechanical Dimensions (Case No. 918) 43 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Mechanical Information Freescale Semiconductor, Inc. 5.4 208-Pin MAP BGA Package LASER MARK FOR PIN A1 IDENTIFICATION IN THIS AREA M K NOTES: 1. ALL DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSION b IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER, PARALLEL TO DATUM PLANE Z. 4. DATUM Z (SEATING PLANE) IS DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 5. PARALLELISM MEASEMENT SHALL EXCLUDE ANY EFFECT OF MARK ON TOP SURFACE OF PACKAGE. E M X D 0.2 4X X Freescale Semiconductor, Inc... DIM A A1 A2 b D E e S MILLIMETERS MIN MAX --2.00 0.40 0.60 1.00 1.30 0.50 0.70 17.00 BSC 17.00 BSC 1.00 BSC 0.50 BSC 15X e 3 208X b S A B C D E F G H J K L M N P R T 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 METALIZED MARK FOR PIN A1 IDENTIFICATION IN THIS AREA 0.3 0.1 M M XYZ Z 15X e 5 0.2 Z A A2 A1 Z 4 0.2 Z 208X S VIEW M M VIEW K (ROTATED 90 CLOCKWISE) Figure 23. 208-Pin MAP BGA Mechanical Dimensions (Case No. 1159A-01) 44 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Mechanical Information Freescale Semiconductor, Inc. THIS PAGE INTENTIONALLY LEFT BLANK Freescale Semiconductor, Inc... 45 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA Freescale Semiconductor, Inc. HOW TO REACH US: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution P.O. Box 5405 Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd. SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku Tokyo, 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors Freescale Semiconductor, Inc... Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. MOTOROLA and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. All other product or service names are the property of their respective owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. (c) Motorola, Inc. 2003 MAC7100EC/D, Rev. 0.1, For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc. HOW TO REACH US: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution P.O. Box 5405 Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd. SPS, Technical Information Center 3-20-1, Minami-Azabu Minato-ku Tokyo, 106-8573 Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. Silicon Harbour Centre 2 Dai King Street Tai Po Industrial Estate Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors Freescale Semiconductor, Inc... Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. MOTOROLA and the Stylized M Logo are registered in the U.S. Patent and Trademark Office. All other product or service names are the property of their respective owners. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. (c) Motorola, Inc. 2003 MAC7100EC/D, Rev. 0.1, For More Information On This Product, Go to: www.freescale.com Mechanical Information Freescale Semiconductor, Inc. Freescale Semiconductor, Inc... 48 MAC7100 Microcontroller Family Hardware Specifications PRELIMINARY--SUBJECT TO CHANGE WITHOUT NOTICE For More Information On This Product, Go to: www.freescale.com MOTOROLA |
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